Universal Coding of the Reals: Alternative to IEEE Floating Points

Peter Lindstrom, Scott Lloyd & Jeffrey Hittinger (Lawrence Livermore National Laboratory)

Abstract: We propose a modular framework for representing the real numbers that generalizes IEEE, POSITS, and related floating-point number systems, and which has its roots in universal codes for the positive integers such as the Elias codes. This framework unifies several known but seemingly unrelated representations within a single schema while also introducing new representations. We particularly focus on variable-length encoding of the binary exponent and on the manner in which fraction bits are mapped to values. Our framework builds upon and shares many of the attractive properties of POSITS but allows for independent experimentation with exponent codes, fraction mappings, reciprocal closure, rounding modes, handling of under- and overflow, and underlying precision.

A Matrix-Multiply Unit for Posits in Reconfigurable Logic Using (Open)CAPI

Jianyu Chen, Zaid Al-Ars (Delft University of Technology) & H. Peter Hofstee (IBM)

Abstract: We present the design in reconfigurable logic of a matrix multiplier for matrices of 32-bit posit numbers with es=2. Vector dot products are computed without intermediate rounding as suggested by the proposed posit standard to maximally retain precision. An initial implementation targets the CAPI 1.0 interface on the POWER8 processor and achieves about 10Gpops (Giga posit operations per second). Follow-on implementations targeting CAPI 2.0 and OpenCAPI 3.0 on POWER9 are expected to achieve up to 64Gpops. Our design is available under a permissive open source license at https://github.com/ChenJianyunp/Unum_matrix_multiplier. We hope the current work, which works on CAPI 1.0, along with future community contributions, will help enable a more extensive exploration of this proposed new format.

Do we really know how to compute geometrics progression?

Vassil Dimitrov (University of Calgary)

Abstract: The problem of efficient computation of exponentiation has been studied with extreme details, due to its very high importance in implementing various applications. The same cannot be said about the problem of computing sums of consecutive powers of a number or a matrix (sometimes called Neumann matrix polynomials). This is somewhat unusual, because many problems in graph theory, coding theory, cryptography and, most notably, numerical analysis, can naturally lead to this computational task.

The seminar is aimed at unveiling some rather interesting and non-trivial computational results, associated with the division-free evaluation of the Neumann polynomials. Many of the upper bounds obtained are better than the best known estimates. The specific analysis of the computational complexity of based on some classical Markov chain analysis techniques.

The investigation on this particular problem has led to the discovery of double and multiple-base number systems. They have found a huge number of important applications in the domain of encryption and digital signal processing. To wit, many of the current records in elliptic curve cryptographic protocols (used, for example in block-chain applications) make a clever use of the multiple-base representation of integers.

Possible applications of the new polynomial evaluation methods will be discussed. They include algorithms for efficient solution of a system of linear equations, implementation of the Google's page-ranking algorithms and computer graphics. A large number of generalizations and additional applications will be presented. We will show how the evaluation of any polynomial can be converted into the evaluation of Neumann polynomials.

The last part of the talk will be dedicated to the comparison between the techniques outlined in this talk for polynomial evaluations over floating-point and posit arithmetic. The numerical results have been obtained by using our own MatLab posit library. Posit arithmetic offer significantly more accurate polynomial evaluation and can be used in a very wide range of applications.

Verification of Numerical Results, using Posits, Valids, Quires

Gerd Bohlender (previously Karlsruhe Institute of Technology, Germany)

Abstract: Classical floating-point methods provide only approximations of results without rigorous error bounds.
Interval methods have been developed which:

1. Deliver guaranteed error bounds for the result,
2. Prove the existence (and possibly uniqueness) of the result within these bounds.

Such methods have been implemented e.g. in XSC languages, providing “eXtensions for Scientific Computing”. These methods are based on interval arithmetic and an exact dot product, special numerical algorithms, and language support e.g. on the base of C++.

It is essential to achieve high performance for interval operations and exact dot products, so that these methods are accepted in the scientific community. Many hardware proposals and prototypes have been developed for this goal.

Posits promise higher performance and better accuracy than traditional IEEE floating-point arithmetic. XSC methods can be based on posits instead of floating-point numbers. In such an environment, valids may serve to store interval bounds. Quires may be used to store intermediate results of exact dot products. It might be necessary to adapt a programming environment like C-XSC to posit arithmetic and to modify or fine-tune the algorithms for optimal performance.

Provably Correct Posit Arithmetic with Fixed-Point Big Integer

Shin Yee Chung (SpeedGo Computing)

Abstract: Floating-point number format is used extensively in many applications, especially scientific software. The applications rely on efficient hardware floating-point support to perform arithmetic operations. With the advent of multicore CPUs and massively parallel GPUs, the memory bandwidth of a computer system is increasingly limited for each of the compute cores. The limited memory bandwidth is a serious bottleneck to the system performance. The posit number format is a promising approach to improve the accuracy of the arithmetic operations with more efficient use of bit storage, hence, reducing memory contention. However, robust and reliable software implementations of posit arithmetic libraries in C/C++ or Python are not readily available. In this paper, we seek to develop provably correct posit arithmetic based on fixed-point big integers. A robust and reliable implementation can then serve as a reference for other hardware-optimized implementations, as a test bed for applications to experiment with different posit bit configurations, and to analyze the relative errors of using smaller bit sizes in the posit numbers compared to using the native 32-bit or 64-bit floating-point numbers.

The Slide Number Format

Ignaz Kohlbecker (Emrgee GmbH)

Abstract: The Slide number format divides the real number line into connected sets. Compared to the unum format, there is no ubit, no infinity, and values are placed on a logarithmic scale. Formal definitions for Slides and intervals composed of Slide pairs are provided. The relative error is compared with that of single precision floats. The performance of conversion to and from human readable form is measured.

High-level .NET Software Implementations of Unum Type I and Posit with Simultaneous FPGA Implementation Using Hastlayer

Zoltan Lehoczky, Andras Retzler, Richard Toth, Almos Szabo, Benedek Farkas & Krisztian Somogyi (Lombiq Technologies Ltd)

Abstract: To provide a solution for the issues of the IEEE 754 Standard’s floating-point number representation Dr. John L. Gustafson proposes a new number type called unum and its most recent variant, posit. In this paper we present a talk for CoNGA on the software and hardware implementations of these number types we developed.

The software implementation is built on the .NET platform as an open source library written in the C# programming language. It’s suitable to be tested in any .NET program.

By using our .NET to FPGA converter tool called Hastlayer we were able to automatically create FPGA implementations for unum and posit and compare them to the software implementation.

Work on both the software implementations of these numbers types and on Hastlayer is experimental and ongoing.

Accelerating POSIT-based computations using FPGAs and OpenCL

Artur Podobas (Tokyo Institute of Technology)

Abstract: Recently, the POSIT floating point format has been proposed to replace and/or complement the current de-facto IEEE-754 standard. Being a newly proposed format, it is imperative to evaluate POSIT on large and complex real-life cases and position their performance and precision against the existing IEEE 754 standard way of computing. Unfortunately, computing using POSIT arithmetic is today done by emulating their behavior; the lack of hardware supporting the POSIT operators cripples the potential performance and thus limits the magnitude of real-life problems that can be evaluated.

In this presentation, we will look into how we can exploit Field-Programmable Gate-Arrays (FPGAs) to accelerate POSIT arithmetic. Describing POSIT operators in low-level hardware (VHDL) and leveraging FPGAs allows us to run many times faster than through emulation. Furthermore, we can modify the POSIT format and reason about its impact on the hardware (compute/byte ratio) and execution performance of applications.

Finally, we also show how to take our proposed low-level POSIT operators and integrate them into a more abstract and easy-to-use framework such as OpenCL. Here, programmers need not bother with low-level hardware details of the POSIT operators, but instead access them through a OpenCL-specific library using simple function calls. We conclude our presentation with an application study using OpenCL and POSIT arithmetic.